STP10NB50 STP10NB50fp n - channel 500v - 0.55 w - 10.6a - to-220/to-220fp powermesh ? mosfet n typical r ds(on) = 0.55 w n extremely high dv/dt capability n 100% avalanche tested n very low intrinsic capacitances n gate charge minimized description using the latest high voltage mesh overlay ? process, stmicroelectronics has designed an advanced family of power mosfets with outstanding performances. the new patent pending strip layout coupled with the companys proprietary edge termination structure, gives the lowest rds(on) per area, exceptional avalanche and dv/dt capabilities and unrivalled gate charge and switching characteristics. applications n high current, high speed switching n switch mode power supplies (smps) n dc-ac converters for welding equipment and uninterruptible power supplies and motor drive ? internal schematic diagram october 1999 1 2 3 type v dss r ds(on) i d STP10NB50 STP10NB50fp 500 v 500 v < 0.60 w < 0.60 w 10.6 a 10.6 a absolute maximum ratings symbol parameter value unit STP10NB50 STP10NB50fp v ds drain-source voltage (v gs = 0) 500 v v dgr drain- gate voltage (r gs = 20 k w ) 500 v v gs gate-source voltage 30 v i d drain current (continuous) at t c = 25 o c 10.6 10.6(*) a i d drain current (continuous) at t c = 100 o c 6.4 6.4(*) a i dm ( ) drain current (pulsed) 42.4 42.4 a p tot total dissipation at t c = 25 o c 135 40 w derating factor 1.08 0.32 w/ o c dv/dt( 1 ) peak diode recovery voltage slope 4.5 4.5 v/ns v iso insulation withstand voltage (dc) ? 2000 v t stg storage temperature -65 to 150 o c t j max. operating junction temperature 150 o c ( ) pulse width limited by safe operating area ( 1 ) i sd 10.6 a, di/dt 200 a/ m s, v dd v (br)dss , tj t jmax ( * ) limited only by maximum temperature allowed to-220 to-220fp 1 2 3 1/9
thermal data to-220 to-220fp r thj-case thermal resistance junction-case max 0.93 3.12 o c/w r thj-amb r thc-sink t l thermal resistance junction-ambient max thermal resistance case-sink typ maximum lead temperature for soldering purpose 62.5 0.5 300 o c/w o c/w o c avalanche characteristics symbol parameter max value unit i ar avalanche current, repetitive or not-repetitive (pulse width limited by t j max) 10.6 a e as single pulse avalanche energy (starting t j = 25 o c, i d = i ar , v dd = 50 v) 550 mj electrical characteristics (t case = 25 o c unless otherwise specified) off symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage i d = 250 m a v gs = 0 500 v i dss zero gate voltage drain current (v gs = 0) v ds = max rating v ds = max rating t c = 125 o c 1 50 m a m a i gss gate-body leakage current (v ds = 0) v gs = 30 v 100 na on ( * ) symbol parameter test conditions min. typ. max. unit v gs(th) gate threshold voltage v ds = v gs i d = 250 m a 345v r ds(on) static drain-source on resistance v gs = 10v i d = 5.3 a 0.55 0.60 w i d(on) on state drain current v ds > i d(on) x r ds(on)max v gs = 10 v 10.6 a dynamic symbol parameter test conditions min. typ. max. unit g fs ( * ) forward transconductance v ds > i d(on) x r ds(on)max i d =5.3 a 5 8 s c iss c oss c rss input capacitance output capacitance reverse transfer capacitance v ds = 25 v f = 1 mhz v gs = 0 1480 210 25 pf pf pf STP10NB50 STP10NB50fp 2/9
electrical characteristics (continued) switching on symbol parameter test conditions min. typ. max. unit t d(on) t r turn-on time rise time v dd = 250 v i d = 5.3 a r g = 4.7 w v gs = 10 v (see test circuit, figure 3) 25 13 14 20 ns ns q g q gs q gd total gate charge gate-source charge gate-drain charge v dd = 160 v i d = 10 a v gs = 10 v 38 10 17 49 nc nc nc switching off symbol parameter test conditions min. typ. max. unit t r(voff) t f t c off-voltage rise time fall time cross-over time v dd = 160 v i d = 10 a r g = 4.7 w v gs = 10 v (see test circuit, figure 5) 13 15 25 11 14 28 ns ns ns source drain diode symbol parameter test conditions min. typ. max. unit i sd i sdm ( ) source-drain current source-drain current (pulsed) 10.6 42.4 a a v sd ( * ) forward on voltage i sd =10.6 a v gs = 0 1.6 v t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd =10.6 a di/dt = 100 a/ m s v dd = 50 v t j = 150 o c (see test circuit, figure 5) 560 4.9 17.5 ns nc a ( * ) pulsed: pulse duration = 300 m s, duty cycle 1.5 % ( ) pulse width limited by safe operating area safe operating area safe operating area for to-220fp STP10NB50 STP10NB50fp 3/9
thermal impedence for to-220 output characteristics transconductance thermal impedence for to-220fp transfer characteristics static drain-source on resistance STP10NB50 STP10NB50fp 4/9
gate charge vs gate-source voltage normalized gate threshold voltage vs temperature source-drain diode forward characteristics capacitance variations normalized on resistance vs temperature STP10NB50 STP10NB50fp 5/9
fig. 1: unclamped inductive load test circuit fig. 3: switching times test circuits for resistive load fig. 2: unclamped inductive waveform fig. 4: gate charge test circuit fig. 5: test circuit for inductive load switching and diode recovery times STP10NB50 STP10NB50fp 6/9
dim. mm inch min. typ. max. min. typ. max. a 4.40 4.60 0.173 0.181 c 1.23 1.32 0.048 0.051 d 2.40 2.72 0.094 0.107 d1 1.27 0.050 e 0.49 0.70 0.019 0.027 f 0.61 0.88 0.024 0.034 f1 1.14 1.70 0.044 0.067 f2 1.14 1.70 0.044 0.067 g 4.95 5.15 0.194 0.203 g1 2.4 2.7 0.094 0.106 h2 10.0 10.40 0.393 0.409 l2 16.4 0.645 l4 13.0 14.0 0.511 0.551 l5 2.65 2.95 0.104 0.116 l6 15.25 15.75 0.600 0.620 l7 6.2 6.6 0.244 0.260 l9 3.5 3.93 0.137 0.154 dia. 3.75 3.85 0.147 0.151 l6 a c d e d1 f g l7 l2 dia. f1 l5 l4 h2 l9 f2 g1 to-220 mechanical data p011c STP10NB50 STP10NB50fp 7/9
dim. mm inch min. typ. max. min. typ. max. a 4.4 4.6 0.173 0.181 b 2.5 2.7 0.098 0.106 d 2.5 2.75 0.098 0.108 e 0.45 0.7 0.017 0.027 f 0.75 1 0.030 0.039 f1 1.15 1.7 0.045 0.067 f2 1.15 1.7 0.045 0.067 g 4.95 5.2 0.195 0.204 g1 2.4 2.7 0.094 0.106 h 10 10.4 0.393 0.409 l2 16 0.630 l3 28.6 30.6 1.126 1.204 l4 9.8 10.6 0.385 0.417 l6 15.9 16.4 0.626 0.645 l7 9 9.3 0.354 0.366 ? 3 3.2 0.118 0.126 l2 a b d e h g l6 f l3 g1 123 f2 f1 l7 l4 to-220fp mechanical data STP10NB50 STP10NB50fp 8/9
information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the co nsequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specification mentioned in this pu blication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectron ics products are not authorized for use as critical components in life support devices or systems without express written approval of stmicr oelectronics. the st logo is a trademark of stmicroelectronics ? 1999 stmicroelectronics C printed in italy C all rights reserved stmicroelectronics group of companies australia - brazil - china - finland - france - germany - hong kong - india - italy - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - u.s.a. http://www.st.com . STP10NB50 STP10NB50fp 9/9
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